Ralink SoC GPIO controller bindings

Required properties:
- compatible:
  - "ralink,rt2880-gpio" for Ralink controllers
- #gpio-cells : Should be two.
  - first cell is the pin number
  - second cell is used to specify optional parameters (unused)
- gpio-controller : Marks the device node as a GPIO controller
- reg : Physical base address and length of the controller's registers
- interrupt-parent: phandle to the INTC device node
- interrupts : Specify the INTC interrupt number
- ralink,nr-gpio : Specify the number of GPIOs
- ralink,register-map : The register layout depends on the GPIO bank and actual
		SoC type. Register offsets need to be in this order.
		[ INT, EDGE, RENA, FENA, DATA, DIR, POL, SET, RESET, TOGGLE ]

Optional properties:
- ralink,gpio-base : Specify the GPIO chips base number
- interrupt-controller : marks this as an interrupt controller
- #interrupt-cells : a standard two-cell interrupt flag, see
  interrupt-controller/interrupts.txt

Example:

	gpio0: gpio@600 {
		compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";

		#gpio-cells = <2>;
		gpio-controller;

		reg = <0x600 0x34>;

		interrupt-controller;
		#interrupt-cells = <2>;

		interrupt-parent = <&intc>;
		interrupts = <6>;

		ralink,gpio-base = <0>;
		ralink,nr-gpio = <24>;
		ralink,register-map = [ 00 04 08 0c
				20 24 28 2c
				30 34 ];

	};